More sustainable functional electronics, a new project by CIDETEC Surface Engineering

REFORM to transform the printed electronics industry to make it environmentally sustainable

Technological progress in recent decades has meant that electronics have become part of almost everything we produce, but what happens to these devices once their useful life is over has been left in the background, generating waste that is difficult to manage. The European project REFORM (pRinted Electronics FOR the circular econoMy), coordinated by CIDETEC Surface Engineering, aims to provide a solution to this problem, orienting the industry towards sustainable models thanks to eco-design and the use of more environmentally friendly materials.

The project will develop sustainable electronic manufacturing models, which will focus on the development of bio-based adhesives, all-organic conductive inks and flexible substrates with enhanced recovery. These will be integrated into industry-led functional electronics systems, supported by innovative compliance testing and material recovery methods. This takes a holistic approach to all parties involved in the production chain, achieving not only a fundamental change in technology compatible with industrial reality, but also in the production of prototypes with a direct impact on sustainability.

REFORM brings together a consortium of 12 European partners from eight different countries with a total budget of almost 5M euros. The project is led by researcher Yolanda Alesanco from CIDETEC Surface Engineering, a centre with a strong track record of leadership in large European projects. By combining the unique and complementary expertise of the consortium, REFORM aims to give Europe global leadership in green functional electronics innovation, enhancing European competitiveness and helping to meet the ambitious goals of the European Green Pact.

During the three and a half years of the project, REFORM will build three sustainable demonstrators: a smart logistics label, an integrated wireless sensor and a micro-supercapacitor, taking the project from Technology Maturity Level (TRL) 2/3 to TRL 5.